发明名称 TAPE SUBSTRATE COMPRISING WIRING PATTERN OF STRESS RELAXATION TYPE AND TAPE PACKAGE USING THE SAME
摘要 A tape substrate having wiring patterns of stress relief type and a tape package using the same are provided to prevent electric short between the wiring patterns which are connected to electrode bumps. A base film has a chip mounting region, on which a semiconductor chip(10) having plural electrode bumps(16) is mounted. Wiring patterns(23,25) are formed around the chip mounting region. One end of the wiring bump is connected to the electrode bump, and the other end extends towards the mounting chip region. The wiring pattern has a width corresponding to 45 to 55 percent of the minimum width of the electrode bump. A width difference of the wiring patterns is within 10 percent.
申请公布号 KR20070078030(A) 申请公布日期 2007.07.30
申请号 KR20060016207 申请日期 2006.02.20
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM, DONG HAN;KANG, SA YOON;CHOI, KI WON;DOH, JAE CHEON;SON, DAE WOO;CHUNG, YE CHUNG;HWANG, JI HWAN;CHO, KYONG SOON;HA, JEONG KYU
分类号 H01L21/60 主分类号 H01L21/60
代理机构 代理人
主权项
地址