| 摘要 |
A method for manufacturing a semiconductor device is provided to improve the characteristics of a cell transistor by doping heavily phosphor in a polysilicon layer adjacent to a gate oxide layer regardless of the shape of a lower structure in a three-dimensional cell structure, improving PDR(Poly Depletion Ratio) characteristics and preventing a gate depletion phenomenon. A recess is formed by etching an active region of a semiconductor substrate(100). A gate oxide layer(120) is formed along an upper surface of the resultant structure. First and second doped polysilicon layers(130,133) are formed on the gate oxide layer. The doping concentration of the first polysilicon layer is higher than that of the second polysilicon layer. A PMOS region is exposed to the outside from a peripheral region and a P type ion implantation is performed thereon. An NMOS region is exposed to the outside from the peripheral region and an N type ion implantation is performed.
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