发明名称 METHOD AND ANALYZER FOR ANALYZING SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a method for analyzing a semiconductor device for achieving reproduction of a mechanism of fault and defect occurrence by simulating representative high temperature bias test as a reliability test of a semiconductor, visualizing a state in which the semiconductor device breaks in the high temperature bias test thereby and facilitating estimation of the mechanism of the default and defect occurrence, and to provide a semiconductor device analyzer. SOLUTION: A discrete semiconductor device is connected to two terminals of the analyzer using an OBIRCH method. The voltage of the maximum 250 V is applied by the analyzer on the discrete semiconductor device, and furthermore an infrared laser of high output of 400 mW or less is irradiated. Thereby the surface of the discrete semiconductor device is optically heated at a high temperature, and simulation of the high temperature bias test is enabled. Thereby the state in which the semiconductor device breaks is visualized in the high temperature bias test, the estimation of the mechanism of the fault and defect occurrence is facilitated, and the reproduction of the fault and defect occurrence is achieved. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007187600(A) 申请公布日期 2007.07.26
申请号 JP20060007102 申请日期 2006.01.16
申请人 SANYO ELECTRIC CO LTD 发明人 KANEKO MAMORU
分类号 G01R31/26 主分类号 G01R31/26
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