发明名称 2ND, 3RD AND 4TH ORDER FREQUENCY DOUBLER AND DESIGN METHOD THEREOF
摘要 A second, third, and fourth order frequency multiplier and a method for designing the same are provided to prevent reduction of a multiplying signal level by removing a basic frequency component and a harmonic signal component except for a multiplying harmonic component among second harmonic signal components or more. A second, third, and fourth order frequency multiplier includes a feedforward second, third, and fourth order frequency multiplier and a DGS(Defected Ground Structure) transmission line. The feedforward second, third, and fourth order frequency multiplier has a feedforward, an input matching section, a multiplier, and an output matching section. The feedforward divides an input signal into a main passage and a sub passage to remove a basic frequency signal of the input signal by controlling the amplitude and a phase of a signal with a variable phase converter and a variable attenuator on the sub passage and a coupling coefficient of a coupler on the front or the rear of the multiplier. The input matching section matches to maximally input the basic frequency signal of the input signal divided into the main passage to the multiplier. The multiplier multipliers the matched signal on the input matching section. The output matching section matches to maximally output the signal multiplied on the multiplier at a corresponding doubling frequency. The DGS transmission line outputs each of only second, third, and fourth order multiplying signals by removing harmonics except for a multiplying harmonic component among second harmonic signal components or more.
申请公布号 KR100745039(B1) 申请公布日期 2007.07.26
申请号 KR20060044712 申请日期 2006.05.18
申请人 SEWON TELETECH INC. 发明人 KIM, CHUL DONG;KIM, HONG KI;JEONG, YONG CHAE
分类号 H01P1/213;H03K23/00 主分类号 H01P1/213
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