发明名称 |
Power amplifier bias protection for depletion mode transistor |
摘要 |
<p>A power amplifier bias protection for a depletion mode transistor is achieved according to the invention with a threshold voltage adaptation connected to the Gate of the depletion mode transistor. That threshold voltage adaptation controls a supply voltage switch for the Drain of the depletion mode transistor such that when the threshold voltage adaptation measures a voltage applied to that Gate outside a tolerable predefined range, then it activates the supply voltage switch to disconnect the Drain DC feed line. The input of the supply voltage switch is connected to the Drain voltage source of the depletion mode transistor and the output of the supply voltage switch is connected to the Drain DC feed line.</p> |
申请公布号 |
EP1811658(A1) |
申请公布日期 |
2007.07.25 |
申请号 |
EP20060290176 |
申请日期 |
2006.01.24 |
申请人 |
ALCATEL LUCENT |
发明人 |
SEYFRIED, ULRICH;WIEGNER, DIRK |
分类号 |
H03F1/52 |
主分类号 |
H03F1/52 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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