发明名称 CALCULATION METHOD OF CAPACITANCE FOR LDMOS TRANSISTOR
摘要 A method for calculating capacitance of LDMOS transistor is provided to accurately obtain gate-drain overlap capacitance without changing the area of an existing test structure. A pad which connects a source (S) and a drain terminal(D) of an LDMOS(Lateral Double-diffused MOS) transistor device with a board is connected to a first port of capacitor measuring equipment, and a gate terminal of the device is connected to a second port, thereby measuring first gate capacitance. A pad connecting the source terminal with a board is connected to the first port, and the gate terminal of the device is connected to the second port, thereby measuring second gate capacitance. A gate-drain overlap capacitance is obtained by computing a difference between first and second gate capacitances.
申请公布号 KR100744939(B1) 申请公布日期 2007.07.25
申请号 KR20060077070 申请日期 2006.08.16
申请人 DONGBU ELECTRONICS CO., LTD. 发明人 KWAK, SANG HUN
分类号 H01L27/06;H01L21/66 主分类号 H01L27/06
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