Semiconductor memory devices having negatively biased sub word line scheme and methods of driving the same

摘要

Semiconductor memory devices having a negatively biased sub-word line scheme and methods of driving the same are disclosed. In a semiconductor memory device, NMOS transistors for pulling down a word line enable signal and a word line driving signal to a negative voltage are adjusted to a negative voltage. The negatively biased word line scheme may decrease influx of discharge current into the negative voltage source and decrease negative voltage fluctuations and associated noise.