发明名称 |
Method and circuit for deriving a second clock signal from a first clock signal |
摘要 |
A clock generation circuit for a dual system radio frequency station is provided. The station includes a digital synthesis circuit clocked by a first clock signal for a first RF system that is adapted to generate a base signal output of a predetermined frequency. A second clock signal is derived from the sum of the frequency of the base signal and the frequency of the first clock signal.
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申请公布号 |
US7248658(B2) |
申请公布日期 |
2007.07.24 |
申请号 |
US20010968524 |
申请日期 |
2001.10.02 |
申请人 |
NEC CORPORATION |
发明人 |
ZALIO FILIP |
分类号 |
H03B28/00;H04L7/00;G06F1/03 |
主分类号 |
H03B28/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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