DISPLAY DRIVING INTEGRATED CIRCUIT AND SYSTEM CLOCK GENERATION METHOD GENERATING SYSTEM CLOCK SIGNAL USING OSCILLATOR'S CLOCK SIGNAL

摘要

A display driving integrated circuit for generating a system clock signal and a system clock generating method thereof are provided to generate a system clock signal irrespective of a frame frequency by using a clock signal of an oscillator. A display driving integrated circuit includes a driving frequency output unit(210) and a system clock generator(270). The driving frequency output unit outputs a frame frequency(FF) of a vertical synchronous signal, a horizontal frequency(HF) of a horizontal synchronous signal, and a frequency(PF) of a PCLK signal in response to a clock signal(OSC) of an oscillator. The system clock generator outputs a system clock signal(SYSCLK) in response to the frame frequency, the horizontal frequency, and the PCLK signal frequency.