| 摘要 |
<p>A flash memory device is provided to convert a high voltage transistor of a page buffer into a low voltage transistor by floating a bitline by a backward PN junction in a drain contact having a dual structure of an N-type epitaxial layer and a P-type epitaxial layer. A gate line is formed on a semiconductor substrate(31) defined as a high voltage region and a cell low voltage region. A junction is formed in the semiconductor substrate between the gate lines. A source contact(41) is connected to one junction of the cell low voltage region. A drain contact is made of a junction of epitaxial layers doped with different conductivity types, connected to the other junction of the cell low voltage region. A metal contact(46) is connected to the junction in the high voltage region and a metal contact is connected to the semiconductor substrate in the cell low voltage region. The metal contact in the high voltage region is connected to the drain contact in the cell low voltage region by a bitline(47). In the drain contact, an N-type epitaxial layer(44) and a P-type epitaxial layer(45) are sequentially stacked. The other junction connected to the drain contact can be an N-type junction.</p> |
