| 摘要 |
A semiconductor memory device is provided to increase repair efficiency by making a memory cell array block including a normal cell array block with a defective cell different from a memory cell array block including a redundancy cell block where a redundancy cell corresponding to the defective cell is located. A redundancy selection circuit part(102) provides a redundancy signal of a first level when a fuse address to be electrically trimmed coincides with an external address signal when there is a defective cell. A redundancy circuit part(100) is enabled in response to the redundancy signal of the first level so as to generate a decoding address signal by using a pulse width signal and the external address signal, and is disabled in response to a redundancy signal of a second level so as not to generate the decoding address signal.
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