发明名称 Refresh period generating circuit
摘要 A refresh period generating circuit which generates a refresh period in refreshing a DRAM cell, comprising: an oscillation circuit which oscillates at a frequency with temperature dependence on ambient temperature; a dividing circuit which divides an oscillation output of the oscillation circuit; a temperature detector which detects the ambient temperature; and a selector which switches and selects among division outputs with respective frequencies from the dividing circuit based on an output of the temperature detector, and outputs a signal as a reference of the refresh period. The temperature dependence in the oscillation circuit includes a positive temperature coefficient in a predetermined temperature range, and does not include a positive temperature coefficient out of the predetermined temperature range. The selector switches the division outputs out of the predetermined temperature range.
申请公布号 US7248526(B2) 申请公布日期 2007.07.24
申请号 US20050180552 申请日期 2005.07.14
申请人 ELPIDA MEMORY, INC. 发明人 ITO YUTAKA;ODAIRA NOBUHIRO
分类号 G11C7/00 主分类号 G11C7/00
代理机构 代理人
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