| 摘要 |
<p>A method for fabricating a semiconductor device is provided to control extension of a depletion layer by forming an empty space buried in the periphery of a boundary between a channel region and a source/drain region. A gate insulation layer(210) and a gate conduction layer(220) are sequentially formed on a silicon substrate(200). A hard mask pattern(230) is formed on the gate conduction layer, covering a gate formation region. The gate conduction layer, the gate insulation layer and the substrate are partially etched using the hard mask pattern as an etch mask wherein the substrate can be etched by 500~1000 A. A sidewall insulation layer having a thickness of 100~500 Å is formed on the sidewall of a gate(240) composed of the etched gate insulation layer, the etched gate conduction layer and the etched hard mask pattern and on the sidewall of the etched substrate. A silicon epitaxial layer is formed on the etched substrate. The sidewall insulation layer is removed to form a groove in the substrate at both sides of the gate. An annealing process is performed on the resultant structure to block the inlet part of the groove so that an empty space buried in the substrate at both sides of the gate is formed. A source/drain region(260a,260b) is formed on the silicon epitaxial layer at both sides of the gate, adjoining the buried empty space.</p> |
