发明名称 Error detection and correction in a CAM
摘要 An error detection and correction circuit is connected to at least one memory bank of a CAM device. During background processing (i.e., when the CAM is not performing reading, writing or searching functions) the error detection and correction circuit tests all of the CAM locations that it is connected to in sequence. If an error is detected, the error detection and correction circuit rewrites the CAM location with the correct data. Multiple error correction and detection circuits can be used in the CAM device to test multiple CAM locations simultaneously.
申请公布号 US2007168777(A1) 申请公布日期 2007.07.19
申请号 US20060473309 申请日期 2006.06.23
申请人 REGEV ALON;REGEV ZVI 发明人 REGEV ALON;REGEV ZVI
分类号 G11C29/00;G06F11/10;G11C15/00 主分类号 G11C29/00
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