发明名称 Strip for integrated circuit packages having a maximized usable area
摘要 A strip on which a plurality of integrated circuit package outlines may be fabricated within a plurality of process tools. The strip includes one or more fiducial notches and/or guide pin notches formed in an outer edge of the strip. The one or more fiducial and/or guide pin notches allow a position of the strip to be identified within at least one process tool of the plurality of process tools. By forming the notches in the outer periphery of the strip, the usable area on the strip on which integrated circuit package outlines may be formed is increased. The strip may alternatively include conventional fiducial and/or guide pin holes, with the molding compound applied at least partially around the holes on one or more sides of the strip. The strip may further alternatively include fiducial holes filled with a translucent material that provides stability to the strip while allowing the strip to be used with an optical recognition sensor.
申请公布号 US2007163109(A1) 申请公布日期 2007.07.19
申请号 US20050321426 申请日期 2005.12.29
申请人 TAKIAR HEM;THAVARAJAH MANICKAM;WANG KEN J M;LIAO CHIH-CHIN;MCKENZIE ANDRE;BHAGATH SHRIKAR;CHEN HAN-SHIAO;CHIU CHIN-TIEN 发明人 TAKIAR HEM;THAVARAJAH MANICKAM;WANG KEN J.M.;LIAO CHIH-CHIN;MCKENZIE ANDRE;BHAGATH SHRIKAR;CHEN HAN-SHIAO;CHIU CHIN-TIEN
分类号 H01R43/00 主分类号 H01R43/00
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