发明名称 METHOD FOR MANUFACTURING LAMINATED CHIP VARISTOR
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a laminated chip varistor assuring surge current resistance even after reduction in size, and having excellent reliability. <P>SOLUTION: The method for manufacturing a laminated chip varistor comprises a step of preparing a green sheet including varistor powder and organic material; alternately laminating a conductive layer comprising Ag or a metal mainly formed of Ag and an organic material and the green sheet to manufacture the laminated chip varistor green chip; and baking the laminated chip varistor green chip within a burning furnace within a burning furnace. The varistor powder includes an element that is liquidified in the burning step, and the green sheet and the conductive layer are integrally sintered under the condition that the element liquidified in the burning step wets the conductive layer. Accordingly, even when size reduction is attained, the laminated chip varistor assuring higher surge current resistance and higher reliability can be provided. <P>COPYRIGHT: (C)2007,JPO&INPIT</p>
申请公布号 JP2007184335(A) 申请公布日期 2007.07.19
申请号 JP20060000344 申请日期 2006.01.05
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 ISHIBASHI HIROSHI;MUTO NAOKI
分类号 H01C7/10 主分类号 H01C7/10
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