| 摘要 |
A transistor type ferroelectric memory includes a group-IV semiconductor layer (10), an oxide semiconductor layer (20) formed over the group-IV semiconductor layer, a ferroelectric layer (30) formed over the oxide semiconductor layer, a gate electrode (40) formed over the ferroelectric layer, and a source region (12) and a drain region (14) formed in the group-IV semiconductor layer.
The group-IV semiconductor layer (10) and the oxide semiconductor layer (20) form a pn junction with a depletion layer at the interface of both layers. By controlling the fixed changes individual in the oxide semiconductor layer (20), the current flow between source (12) and drain (14) can be switched on or off. |
