发明名称 Methods for fabricating chip-scale packages having carrier bonds
摘要 A chip-scale package and method for making same. A pattern of conductive traces in the form of lead fingers is adhered to the active surface of a semiconductor die, preferably using a dielectric tape. The conductive traces are wire bonded to bond pads of the semiconductor die to establish electrical connections therebetween. Discrete conductive elements are then attached to the conductive traces in a pattern corresponding to a terminal pad pattern on a carrier substrate such as a printed circuit board. The semiconductor die, tape, conductive traces, wire bonds and interior portions of the discrete conductive elements are encapsulated to create a completed chip-scale package having an array of conductive connections protruding through the encapsulant.
申请公布号 US2007166882(A1) 申请公布日期 2007.07.19
申请号 US20070716464 申请日期 2007.03.09
申请人 JIANG TONGBI;SCHROCK EDWARD A 发明人 JIANG TONGBI;SCHROCK EDWARD A.
分类号 H01L21/00;H01L21/44;H01L23/31 主分类号 H01L21/00
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