发明名称 DATA TRANSFER SYSTEM
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a data transfer system for reducing such a risk that read data are decoded even when a semiconductor memory such as a DRAM is removed from a main body, and that data stored in a semiconductor memory are read. <P>SOLUTION: A scrambler 20 changes scramble data synchronously with a Write Busy/Ready signal to be supplied from a DDR SDRAM I/F30, and changes the connection destination of a data transfer path based on the changed scramble data to scramble data received from a WR FiFo 10. The scrambled data are written in a DDR SDRAM 4 synchronously with an SDRAM Data Strobe to be output from a DDR SDRAM I/F 30 with scramble data used when the data have been scrambled. <P>COPYRIGHT: (C)2007,JPO&INPIT</p>
申请公布号 JP2007183834(A) 申请公布日期 2007.07.19
申请号 JP20060001797 申请日期 2006.01.06
申请人 SHARP CORP 发明人 YOSHIDA SEIICHI
分类号 G06F12/14;G06F3/06;G06F3/08 主分类号 G06F12/14
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