发明名称 |
Method, system and program product for facilitating debugging of simulation results obtained for an optimized simulation model of a device design having hierarchically-connected components |
摘要 |
A computer-implemented processing tool is provided for facilitating debugging of simulation results obtained for an optimized simulation model of a device having hierarchically-connected components. The tool includes: receiving a component port name of the device to be searched; automatically checking a hardware descriptive language description of the device for a next higher level component of the device that instantiates the component having the component port name to be searched; locating a signal name in the next higher level component that is connected to the port identified by the component port name; and outputting the signal name as a signal that drives the named component port when the signal is other than a port signal of the next higher level component. Otherwise, repeating the automatically checking and the locating when the signal name in the next higher level component is a port signal of a further higher level component.
|
申请公布号 |
US2007168741(A1) |
申请公布日期 |
2007.07.19 |
申请号 |
US20050282091 |
申请日期 |
2005.11.17 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
CHADHA SUNDEEP;PROCH SUDHI R. |
分类号 |
G06F11/00 |
主分类号 |
G06F11/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|