| 摘要 |
An integrated circuit comprises a circuit under test, a plurality of scan chains coupled to the circuit under test, and a dynamically configurable input selection logic. The dynamically configurable input selection logic couples to the scan chains, receives one or more scan input bit streams, and provides a scan input bit stream to any of the scan chains in accordance with a dynamically controllable control signal. In this manner, pins on the integrated circuit may be shared among multiple scan chains and the integrated circuit may be tested in accordance with any of a plurality of selectable scan chain configurations.
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