发明名称 |
Method and device for on-chip decoupling capacitor using nanostructures as bottom electrode |
摘要 |
Apparatus for an on-chip decoupling capacitor. The capacitor includes a bottom electrode that consist of nanostructures deposited over a planarized metal, a dielectric material deposited over the nanostructures, and a top electrode deposited over the dielectric material. The shape of the bottom electrode is tunable by modulating the diameter and/or the length of the nanostructures to produce an increase in capacitance without increasing the footprint of the on-chip decoupling capacitor.
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申请公布号 |
US7244983(B2) |
申请公布日期 |
2007.07.17 |
申请号 |
US20030420774 |
申请日期 |
2003.04.23 |
申请人 |
INTEL CORPORATION |
发明人 |
KIM SARAH E.;KELLAR SCOT A. |
分类号 |
H01L27/108;H01L21/02;H01L23/50;H01L27/08 |
主分类号 |
H01L27/108 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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