发明名称 Determining an optimal sampling clock
摘要 In some embodiments, a phase detector receives a set of sampling clock signals and a data signal and compares each of the clock signals to the data signal. A clock selector selects an optimal sampling clock signal from the set of sampling clock signals based on a trend of a relationship between the clock signals and the data signal. Other embodiments are described and claimed.
申请公布号 US7245682(B2) 申请公布日期 2007.07.17
申请号 US20020262601 申请日期 2002.09.30
申请人 INTEL CORPORATION 发明人 HSU JEN-TAI;TO HING-YAN;VOLK ANDREW M.
分类号 H04L7/00;H04L7/033 主分类号 H04L7/00
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