发明名称 Bus master and bus slave simulation using function manager and thread manager
摘要 The system simulator comprises master simulators 1 f , 1 s , 2 f and 2 s for simulating a bus master, a slave simulator L for simulating a bus slave, a function manager F for sequentially actuating the master simulator and the slave simulator by using a function call and a thread manager S for actuating the master simulator by using a thread switching. When the master simulator activated by using the function call from the function manager accesses the slave simulator and an access blocking is caused, the master simulator controls the thread manager such that the master simulator is activated by using the thread switching carried out by the thread manager. Thus, it is possible to carry out the simulation at a high speed without getting into a dead lock state caused by the access blocking and without changing the simulator for simulating a conventional bus master.
申请公布号 US7246052(B2) 申请公布日期 2007.07.17
申请号 US20020107056 申请日期 2002.03.28
申请人 NEC ELECTRONICS CORPORATION 发明人 SHAMOTO EIJI;FUKUDA MASAHIRO
分类号 G06F11/28;G06F17/50;G06F9/46;G06F9/52;G06F11/26;G06F11/30;G06F13/00;G06F15/16;G06F19/00 主分类号 G06F11/28
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