发明名称 |
Data read circuit for use in a semiconductor memory and a method therefor |
摘要 |
A data read circuit and method for use in a semiconductor memory device that has a memory cell array are provided. The circuit includes a selector for selecting a unit cell within the memory cell array in response to an address signal; a clamping unit for supplying a clamp voltage having a level for a read operation to a bit line of the selected unit cell in response to a clamp control signal; a precharge unit for precharging a sensing node to a voltage having a power source level in response to a control signal of a first state in a precharge mode, and compensating through the sensing node for a reduced quantity of current at the bit line in response to a control signal of a second state in a data sensing mode; and a sense amplifier unit for comparing a level of the sensing node with a reference level, and for sensing data stored in the selected unit cell.
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申请公布号 |
US7245543(B2) |
申请公布日期 |
2007.07.17 |
申请号 |
US20050249858 |
申请日期 |
2005.10.13 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
OH HYUNG-ROK;CHO WOO-YEONG;KWAK CHOONG-KEUN |
分类号 |
G11C7/00;G11C13/00;G11C7/06;G11C7/12;G11C13/02;G11C16/02;G11C16/26;H01L27/105;H01L45/00 |
主分类号 |
G11C7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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