发明名称 Analog to digital signal converter having sampling circuit with divided integrating capacitance
摘要 An analog-to-digital converter (ADC) includes a modulator and a decimation filter. The modulator includes a sampling circuit, integrator, a quantizer, and feedback circuitry. The sampling circuit includes at least one sampling capacitor and a plurality of dump capacitors. A sum of the capacitance of the dump capacitors is substantially equal to a capacitance of the sampling capacitors. Combined sampling/dump capacitors having approximately equal capacitance may be used with the sampling circuit.
申请公布号 US7245247(B1) 申请公布日期 2007.07.17
申请号 US20060355934 申请日期 2006.02.16
申请人 SIGMATEL, INC. 发明人 MAY MICHAEL R.;FELDER MATTHEW D.
分类号 H03M3/00 主分类号 H03M3/00
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