发明名称 DIGITAL SIGNAL ENCODING DEVICE AND DIGITAL SIGNAL DECODING DEVICE
摘要 <p>In a bit stream syntax containing compressed video slice data for compressed video data of a slice structure, a slice header for compressed video slice data has attached thereto a slice start code, a register reset flag indicating whether a register value, which designates a status of a codeword occurring in an arithmetic coding process, should be reset in the next transmission unit, an initial register value which indicates a register value to be used to start arithmetic coding/decoding to build/decompose the next transmission unit, only when the register reset flag indicates that the register should not be reset. &lt;IMAGE&gt;</p>
申请公布号 KR100740381(B1) 申请公布日期 2007.07.16
申请号 KR20057022204 申请日期 2005.11.21
申请人 发明人
分类号 G06T9/00;H03M7/40;H04N7/12;H04N7/24;H04N7/34;H04N7/52;H04N19/00;H04N19/105;H04N19/13;H04N19/174;H04N19/46;H04N19/51;H04N19/625;H04N19/70;H04N19/91 主分类号 G06T9/00
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