发明名称 |
Process to integrate fabrication of bipolar devices into a CMOS process flow |
摘要 |
A BiCMOS method for forming bipolar junction transistors and CMOS devices in a substrate. To avoid erosion of the bipolar junction transistor material layers, gate spacers for the CMOS devices are formed while a bipolar junction transistor photoresist layer is in place. The photoresist layer is used for etching the emitter polysilicon layer (for single polysilicon layer bipolar junction transistors) or for etching the base polysilicon layer (for double polysilicon layer bipolar junction transistors) prior to gate spacer etch.
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申请公布号 |
US2007161173(A1) |
申请公布日期 |
2007.07.12 |
申请号 |
US20060639847 |
申请日期 |
2006.12.15 |
申请人 |
KERR DANIEL C;PATNAIK MAMATA;PITA MARIO;RAGHAVAN VENKAT;CHEN ALAN S |
发明人 |
KERR DANIEL C.;PATNAIK MAMATA;PITA MARIO;RAGHAVAN VENKAT;CHEN ALAN S. |
分类号 |
H01L21/8234;H01L21/302;H01L21/8238;H01L21/8249 |
主分类号 |
H01L21/8234 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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