发明名称 RECEIVING CIRCUIT, RECEIVER AND RECEIVING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a receiving circuit which can correctly obtain a video detection output even when the video modulation degree of a video intermediate signal becomes over-modulation and even with respect to any video pattern and in which circuit scale is made large. SOLUTION: The receiving circuit has: a PLL (Phase Locked Loop) circuit 102 which outputs an oscillation signal synchronized with a phase of a modulation signal using a video signal as a modulated signal; a video detector 21 which outputs the video signal by performing synchronous detection of the modulation signal using the oscillation signal and a frequency detection circuit 33 which outputs a frequency detection signal indicating whether or not the above phase synchronization circuit is at a lock state by judging whether or not a frequency of the oscillation signal is within a predetermined range and controls the PLL circuit 102 using the frequency detection signal. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007181046(A) 申请公布日期 2007.07.12
申请号 JP20050378906 申请日期 2005.12.28
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MORI SACHIKO;OBA YASUO;IKUMA MAKOTO
分类号 H04N5/44 主分类号 H04N5/44
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