发明名称 Manufacturing of memory array and periphery
摘要 Method of manufacturing a semiconductor chip. An array region gate stack is formed on an array region of a substrate and a periphery region gate stack is formed on a periphery region of a substrate. A first dielectric material, a charge-storing material, and a second dielectric material are deposited over the substrate. Portions of the first dielectric material, the charge-storing material, and the second dielectric material are removed to form storage structures on the array region gate stack and on the periphery region gate stack. The storage structures have a generally L-shaped cross-section. A first source/drain region is formed in the array region well. A third dielectric material and a spacer material are deposited over the substrate. Portions of the third dielectric material and the spacer material are removed to form spacers. A second source/drain region is formed in the periphery region well.
申请公布号 US2007161174(A1) 申请公布日期 2007.07.12
申请号 US20060529067 申请日期 2006.09.28
申请人 发明人 LEE TZYH-CHEANG;YANG FU-LIANG;HWANG JIUNN-REN;LEE TSUNG-LIN
分类号 H01L21/8238;H01L21/336 主分类号 H01L21/8238
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