High-speed low-voltage programming and self-convergent high-speed low-voltage erasing schemes for EEPROM

摘要

The present invention provides a high-speed low-voltage programming scheme and self-convergent high-speed low-voltage erasing schemes for Electrically Erasable Programmable Read-Only Memories (EEPROM). For the N-type Field Effect Transistor (NFET) based NVM programming, an elevated source voltage to the substrate can achieve high efficient Drain-Avalanche-Hot-Electron Injection (DAHEI) into the floating gate resulting in high-speed and low-voltage operations. The self-convergent and low-voltage erasing can be achieved by applying Drain-Avalanche-Hot Hole Injection (DAHHI) with the conditions of restricted maximum drain current and a moderate control gate voltage enough to turn on the NFET. For the p-type FET (PFET) based EEPROM programming, a negative source voltage relative to the substrate can achieve high efficient Drain-Avalanche-Hot-Hole Injection (DAHHI) into the floating gate resulting in high-speed and low voltage operations. The self-convergent and low voltage erasing can be achieved by applying Drain-Avalanche-Hot-Electron Injection (DAHEI) with the conditions of restricted maximum magnitude of drain current and a negative moderate control gate voltage enough to turn on the PFET.