In some embodiments, a chip includes first and second bank sets, a first data port mapped to the first bank set, and a second data port mapped to the second bank set. Other embodiments are described.
申请公布号
WO2007078632(A2)
申请公布日期
2007.07.12
申请号
WO2006US47081
申请日期
2006.12.08
申请人
INTEL CORPORATION;BAINS, KULJIT, S.;HALBERT, JOHN, B.;OSBORNE, RANDY, B.
发明人
BAINS, KULJIT, S.;HALBERT, JOHN, B.;OSBORNE, RANDY, B.
