发明名称 ARCHITECTURE COMBINING A CONTINUOUS-TIME STAGE WITH A SWITCHED-CAPACITOR STAGE FOR DIGITAL-TO-ANALOG CONVERTERS AND LOW-PASS FILTERS
摘要 A digital to analog converter (DAC) includes a first continuous-time stage that receives an input signal associated with a digital signal and performs continuous-time digital-to-analog conversion operations on the input signal. The first continuous-time stage outputs a first output signal. A second switched-capacitor stage receives the first output signal and performs switched-capacitor filtering of the first output signal. The second switched-capacitor stage outputs a second output signal that is sent to a low pass filter to form a continuous analog signal associated with the digital signal.
申请公布号 US2007159370(A1) 申请公布日期 2007.07.12
申请号 US20060616468 申请日期 2006.12.27
申请人 BAGINSKI PAUL A;ADAMS ROBERT;NGUYEN KHIEM 发明人 BAGINSKI PAUL A.;ADAMS ROBERT;NGUYEN KHIEM
分类号 H03M1/66 主分类号 H03M1/66
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