发明名称 SEMICONDUCTOR SUBSTRATE WITH EXPOSED UPPER AND LOWER SIDES
摘要 Semiconductor package assemblies include a package subassembly, having at least one die affixed to, and electrically interconnected with, a die attach side of a first package substrate, and a second substrate having a first side and a second ("land") side, mounted over the first package with the first side of the second substrate facing the die attach side of the first package substrate, and supported by a spacer or a spacer assembly. Accordingly, the die attach sides of the first substrate and the first side of the second substrate face one another, and the "land" sides of the substrates face away from one another. Z-interconnection of the package and the substrate is by wir bonds connecting the first and second substrates. The assembly is encapsulated in such a way that both the land side of the second substrate (one side of the assembly) and a portion of the land side of the first package substrate (on the opposite side of the assembly) are exposed, so that second level interconnection and interconnection with additional components may be made. Also, methods for making such package assemblies include steps of providing a substrate, preferably as a strip of ball grid array (BGA) or land grid array (LGA) substrates.
申请公布号 WO2006118982(A3) 申请公布日期 2007.07.12
申请号 WO2006US16143 申请日期 2006.04.27
申请人 STATS CHIPPAC LTD.;KARNEZOS, MARCOS;CARSON, FLYNN 发明人 KARNEZOS, MARCOS;CARSON, FLYNN
分类号 H01L23/02;H01L21/00;H01L21/26;H01L23/10 主分类号 H01L23/02
代理机构 代理人
主权项
地址