发明名称 Apparatuses and associated methods for improved solder joint reliability
摘要 Apparatuses and associated methods to improve integrated circuit packaging are generally described. More specifically, apparatuses and associated methods to improve solder joint reliability are described. In this regard, according to one example embodiment, one or more strengthening pin(s) are coupled to the periphery of a package substrate, the strengthening pin(s) capable of coupling to a circuit board.
申请公布号 US7242084(B2) 申请公布日期 2007.07.10
申请号 US20050139223 申请日期 2005.05.27
申请人 INTEL CORPORATION 发明人 WONG CHEE WAI;TAY CHENG SIEW
分类号 H01L23/48 主分类号 H01L23/48
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