| 摘要 |
In order to provide a high-speed-pulse polarity modulation circuit for realizing low power consumption and miniaturization and reducing noise occurring at a middle level which is a baseline for a bipolar pulse, a modulation circuit for converting a unipolar pulse into a bipolar pulse in accordance with a value of input data is structured such that differential transistor pairs are double stacked, and one of the differential transistor pairs in an upper stage outputs polarity modulation pulses, and a middle potential between logic high and low is applied to the gates of the other differential transistor pair the gates of which are coupled together.
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