发明名称 |
SIGNAL PROCESSING APPARATUS AND IMAGE PROCESSING APPARATUS |
摘要 |
A signal processing apparatus for linear interpolation capable of performing operations to obtain suitable original data even when an interpolation coefficient a is 1.0, wherein a correction term selects A when .alpha. = 0 .times. FF (.alpha. = 1.0) and selects B when the bit is 0. The selected data becomes an element of addition by being shifted for the number of bits of .alpha.. A product summation operation term uses the upper 8 bits of the result of multiplication of 8 bits .times. 8 bits and shifts the 8-bit result of operation 8 bits to the left so as to enable further addition of the product summation operation term. An adder adds the shifted correction term,.the partial products out_0 to out_7, and the product summation operation term and outputs the upper 8 bits as the result of the operation.
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申请公布号 |
CA2260345(C) |
申请公布日期 |
2007.07.10 |
申请号 |
CA19992260345 |
申请日期 |
1999.01.25 |
申请人 |
SONY CORPORATION |
发明人 |
HORIOKA, TOSHIO;IIDA, RYOHEI |
分类号 |
G06F7/00;G06F17/10;G06F17/17;G06T1/00;G06T1/20;G06T15/00;G06T15/02 |
主分类号 |
G06F7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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