发明名称 |
Method of forming a dual damascene structure |
摘要 |
An improved method of forming an integrated circuit that includes a dual damascene interconnect is described. A contact via hole is formed in a dielectric layer disposed above a semiconductor substrate. A protective layer is disposed on top of the dielectric layer and in the contact via hole, and subsequently forming as a recessed plug in the via, followed by etching to form a trench to complete formation of a dual damascene opening.
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申请公布号 |
US7241682(B2) |
申请公布日期 |
2007.07.10 |
申请号 |
US20040789083 |
申请日期 |
2004.02.27 |
申请人 |
TAIWAN SEMINCONDUCTOR MANUFACTURING CO., LTD. |
发明人 |
HO BANG-CHEIN;CHEN JIAN-HONG;OU YANG DA-JHONG |
分类号 |
H01L21/4763;H01L21/768 |
主分类号 |
H01L21/4763 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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