发明名称 |
NAND memory device and programming methods |
摘要 |
A NAND Flash memory device is described that can reduce bit line coupling and floating gate coupling during program and verify operations. Consecutive bit lines of an array row are concurrently programmed as a common page. Floating gate coupling during programming can therefore be reduced. Multiple verify operations are performed on separate bit lines of the page. Bit line coupling can therefore be reduced.
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申请公布号 |
US2007153579(A1) |
申请公布日期 |
2007.07.05 |
申请号 |
US20070714542 |
申请日期 |
2007.03.06 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
ROOHPARVAR FRANKIE F.;ABEDIFARD EBRAHIM |
分类号 |
G11C16/04;G11C11/34;G11C16/06 |
主分类号 |
G11C16/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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