| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit which can prevent a gate insulation layer of a transistor in the circuit selecting a row in a memory cell array from being broken down due to an antenna effect. <P>SOLUTION: A word line decode circuit 5 is equipped with a first group interconnection GL0 to which internal address signals A0-A3 are supplied, a second and a third group interconnections GL1, GL2 to which internal address signals A4-A11 are supplied, a forth group interconnection GL3, a fifth group interconnection GL4 which is formed in the upper layer than the first-forth group interconnections and interconnects between the first group interconnection and the forth group interconnection, a word line drive circuit WL47 which is connected to the every one of the each group of the interconnections of the first-third groups and activates the word lines WL0-WL47, and a word line drive circuit WL48 which is connected to the every one of the each group of the interconnections of the second-fourth groups and activates the word line WL48. <P>COPYRIGHT: (C)2007,JPO&INPIT |
