There is provided apparatus for protection against over voltages and/or under voltages. The apparatus comprises a pass transistor through which an input voltage is applied, the input voltage varying between a low voltage (0) and a high voltage (1), and means for selectively varying the gate voltage of the pass transistor when the input voltage is transitioning from the low voltage to the high voltage or from the high voltage to the low voltage. The pass transistor may comprise an NMOS or a PMOS transistor. There is also provided a receiver comprising the aforementioned apparatus and a method for protecting against over voltages and/or under voltages.
