| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device whose layout design has been simplified, and to provide a method for design thereof. SOLUTION: The device includes a first flip-flop circuit, a second flip-flop circuit, and a logic circuit between the output of the first flip-flop circuit and the input of the second flip-flop circuit. When a tolerance of process variation in delay time is large, the logic circuit employs a first cell formed using multiple first MOSFETs of the standard size. When the tolerance is small, it employs a second cell in which the same MOSFETs as for the first cell are used for formation, and the gate length and width are made larger than those for the first MOSFET to make its delay time equal to that for the first cell. COPYRIGHT: (C)2007,JPO&INPIT
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