发明名称 |
Address generation for video processing |
摘要 |
A video processing system includes input and output address generators. The address generators are capable of generating linear addresses associated with data to be read from and written to a device. The linear address is converted to a random address so that data associated with a macroblock may be read from the device and written to the device.
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申请公布号 |
US2007153133(A1) |
申请公布日期 |
2007.07.05 |
申请号 |
US20070710772 |
申请日期 |
2007.02.26 |
申请人 |
XIANG SHUHUA;YUAN HONGJUN;LI SHA |
发明人 |
XIANG SHUHUA;YUAN HONGJUN;LI SHA |
分类号 |
H04N9/64;G06T1/60;H04N5/14;H04N7/26 |
主分类号 |
H04N9/64 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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