A NAND flash memory device incorporates a unique booster plate design. The booster plate is biased during read and program operations and the coupling to the floating gates in many cases reduces the voltage levels necessary to program and read the charge stored in the gates. The booster plate also shields against unwanted coupling between floating gates. Self boosting, local self boosting, and erase area self boosting modes used with the unique booster plate further improve read/write reliability and accuracy. A more compact and reliable memory device can hence be realized according to the present invention.
申请公布号
WO2007075180(A1)
申请公布日期
2007.07.05
申请号
WO2006US05629
申请日期
2006.02.17
申请人
SANDISK CORPORATION;FANG, HAO;PHAM, TUAN;HIGASHITANI, MASAAKI;HEMINK, GERRIT JAN
发明人
PHAM, TUAN;HIGASHITANI, MASAAKI;HEMINK, GERRIT JAN