发明名称 METHOD OF MANUFACTURING SPLIT GATE FLASH MEMORY
摘要 A split gate flash memory is provided. Trenches are formed in the substrate to define active layers. The device isolation layers are formed in the trenches. The surface of the device isolation layers is lower than the surface of the active layers. The stacked gate structures each including a tunneling dielectric layer, a floating gate and a cap layer are formed on the active layers. The inter-gate dielectric layers are formed on the sidewalls of the stacked gate structures. The select gates are formed on one side of the stacked gate structure and across the active layer. The select gate dielectric layers are formed between the select gates and the active layers. The source regions are formed in the active layers on the other side of the stacked gate structures. The drain regions are formed in the active layers on one side of the select gates.
申请公布号 US2007155087(A1) 申请公布日期 2007.07.05
申请号 US20070683439 申请日期 2007.03.08
申请人 POWERCHIP SEMICONDUCTOR CORP. 发明人 CHANG KO-HSING;CHUNG WU-TSUNG;HUANG TSUNG-CHENG
分类号 H01L21/8238 主分类号 H01L21/8238
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