发明名称 System and method for low power wordline logic for a memory
摘要 A method of reducing power consumption of a memory is provided. A request is received to access a memory device, including a decoder, a plurality of wordline drivers and a plurality of wordlines. Each wordline is associated with a wordline driver of the plurality of wordline drivers. The request is decoded by a decoder to determine an address associated with the request. A wordline driver of the plurality of wordline drivers is selectively powered to access the address of the memory device, where the wordline driver is associated with a particular wordline of the plurality of wordlines that is related to the address bits, without powering other wordlines of the plurality of wordlines.
申请公布号 US2007153584(A1) 申请公布日期 2007.07.05
申请号 US20060402483 申请日期 2006.04.11
申请人 MOHAMMAD BAKER;BASSETT PAUL 发明人 MOHAMMAD BAKER;BASSETT PAUL
分类号 G11C11/34 主分类号 G11C11/34
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