发明名称 A data processing apparatus and method for managing multiple program threads executed by processing circuitry
摘要 A data processing apparatus and method are provided for managing multiple program threads executed by processing circuitry. The multiple program threads include at least one high priority program thread and at least one lower priority program thread. At least one storage unit is shared between the multiple program threads and has multiple entries for storing information for reference by the processing circuitry when executing the program threads. Thread control circuitry is used to detect a condition indicating an adverse effect caused by a lower priority program thread being executed by the processing circuitry and resulting from sharing of the at least one storage unit between the multiple program threads. On detection of such a condition, the thread control circuitry issues an alert signal, and a scheduler is then responsive to the alert signal to cause execution of the lower priority program thread causing the adverse effect to be temporarily halted, for example by causing that lower priority program thread to be de-allocated and an alternative lower priority program thread allocated in its place. This has been found to provide a particularly efficient mechanism for allowing any high priority program thread to progress as much as possible, while at the same time improving the overall processor throughput by seeking to find co-operative lower priority program threads.
申请公布号 GB0709819(D0) 申请公布日期 2007.07.04
申请号 GB20070009819 申请日期 2007.05.22
申请人 ARM LIMITED 发明人
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