| 摘要 |
Method for manufacturing non volatile memory cells integrated on a semiconductor substrate (100), each one comprising a floating gate electrode (110), the method comprising the steps of:
- depositing at least one protective layer (30) on the semiconductor substrate (100),
- forming a first plurality of openings (40) in the protective layer (30),
- etching the semiconductor substrate (100) through the first plurality of openings (40) so as to form a plurality of trenches (60),
- filling in the plurality of trenches (60) and the first plurality of openings (40) by means of an insulation layer (70),
- etching surface portions of the protective layer (30) to form:
- surface portions (71) of the insulation layer (70) projecting from the semiconductor substrate (100) divided from each other by a second plurality of openings (72), and
- lower portions (31) of the protection layer (30) confined below the second plurality of openings (72),
- etching the insulation layer (70) to reduce the cross dimensions of the surface portions (71) of the insulation layer (70),
- removing the lower portions (31) of said protection layer (30) until the semiconductor substrate (100) is exposed.
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