| 摘要 |
An electrostatic discharge protection circuit is provided to protect the gate insulation layer of an NMOS transistor constituting the inner circuit of a semiconductor by applying a higher voltage than that of the threshold voltage of the NMOS transistor to the gate of the NMOS transistor such that the NMOS transistor performs an electrostatic discharge operation. An electrostatic discharge protection circuit is installed between an input/output pad and an input buffer including a first NMOS transistor. A first electrostatic discharge protecting part makes electrostatic current flow to a power supply pad when static electricity is introduced into the input/output pad and reaches a start voltage of an electrostatic discharge operation, connected to the power supply pad and generating a driving voltage by using the electrostatic current. A second electrostatic discharge protecting part makes electrostatic current flow to the power supply pad when the static electricity introduced into the input/output pad reaches the electrostatic discharge starting voltage reduced by the driving voltage and reduces an electrostatic voltage applied to the gate of the first NMOS transistor. The input buffer can be an inverter which inverts the phase of a signal inputted to the input/output pad and transfers the signal with an inverted phase to the inner circuit of a semiconductor.
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