| 摘要 |
An EPROM cell is provided to guarantee a stable breakdown voltage even in the case of a program condition by intensifying a pre-source/drain junction by an STI process. A plurality of gate stacks are formed on a semiconductor substrate. A first spacer is formed on both sidewalls of the gate stack. A trench(27) with a predetermined depth is formed on the semiconductor substrate between the adjacent gate stacks, aligned with the first spacer. A second spacer is formed on the outer wall of the first spacer. A source/drain junction in common with adjacent cells is formed in the semiconductor substrate between the gate stacks. A pre-source/drain junction(28) is formed in the bottom line of the source/drain junction. The pre-source/drain junction can be positioned in a predetermined depth under the trench, aligned with the end of the first spacer. The pre-source/drain junction and the source/drain junction can be doped with the same impurities.
|
